Electrostatic discharge (“ESD”) protection structures are needed for integrated circuits. In ESD protection, an ESD circuit is formed near integrated circuit terminals such as input and output pads, and also for power supply terminals. The ESD protection circuit provides a path to bypass current from the terminal to a ground or from the terminal to a power supply rail, so that the current bypasses the internal circuitry. Voltages far in excess of the operating voltages, in both positive and negative magnitudes, are observed during short duration electrostatic discharges. The ESD protection structure prevents the corresponding ESD current from destroying sensitive components in an integrated circuit.
Silicon controlled rectifiers (“SCRs”), which may be conveniently formed by forming parasitic transistors in doped well regions adjacent a terminal, are often used for ESD structures. Because an SCR can be designed to “trigger” in response to a trigger voltage over a threshold, and then safely conduct ESD stress current through an alternative path and thus protect the internal circuitry coupled to a pad terminal, the SCR provides many features that are desirable for ESD protection.
However, the existing SCR structures also have some characteristics that are undesirable. Existing SCR circuits have relatively slow turn on speed and add capacitance to the input pins, which can create noise or degrade performance for RF circuits, for example. Further, existing SCR circuits have relatively high trigger voltages. As the semiconductor devices produced become increasingly smaller, the thin gate oxides formed become even more susceptible to ESD. Improved ESD circuits are needed with fast turn on speed and low trigger voltages, and with reduced capacitance and without substantially increasing silicon area.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the illustrative example embodiments and are not necessarily drawn to scale.